The Pico Computing Framework—the Ghost in the Machine

The Pico Computing Framework is a Linux-based design utility that provides the vital link between your application software running on a host computer and the hardware algorithm, or firmware, implemented in the FPGA. Think of it as the “Ghost in the Machine”—a powerful but invisible and active intelligence that runs and governs the board-level implementation of FPGA designs, as well as data flow, memory management, system communication, monitoring/debug, and more in ways that make life easy for the FPGA design engineer using vendor tool flows.


The Pico Framework eliminates the need to spend engineering time and money on the many FPGA implementation, overhead, and connectivity functions, thus freeing the designer to focus on the details of the application design. And yet, as powerful as the Framework is, it occupies as little as 1% of the FPGA area (and even less as FPGA densities increase). That’s real value.

The Pico Framework makes it easy to:

  • Load new configuration bitfiles
  • Partition a design across multiple FPGAs in a system
  • Move data from software into FPGAs via streaming or memory mapped models*
  • Expand from one to 10 streams: it is simple in both software and in firmware
  • Configure FPGA communication in myriad ways, whether multi-threaded, peer-to-peer, daisy chained, etc.

The software:

  • Controls all communications; a 48-FPGA system is no more work than a single FPGA
  • Automates all reading and writing to the FPGAs’ off-chip memory (firmware memory interfaces automate all memory systems’ arbitration)
  • Automates all programming of the FPGA(s) in a system
  • Actively monitors FPGA(s) temperature, current, and voltage to enhance system performance and reliability

What’s more,

  • Your production software code can drive a simulation of the FPGA module:
    • The same executable can talk to either a simulation model or a Pico Computing module
    • Common test bench code eliminates test bench/software mismatch errors

And it includes:

  • All drivers including host-side (Unix), interface to host (PCI Express)
  • Pico API (C++)
  • An integrated firmware test suite
  • Support for both PCIe-based designs and embedded applications
  • Reference designs and examples with source files
  • Complete documentation and training

Ready for the fastest, most painless FPGA design experience of your life? Contact us now to learn more.


* We actually prefer to think of everything as a stream, a la the CSP model. The PicoBus interface is simply available for ease of debug or managing control registers.