Hybrid Memory Cube (HMC) & Controller IP
Pico Computing’s innovative HMC controller IP provides tremendous benefits to memory-bound applications, and particularly those that require high bandwidth and fast random access.
The HMC’s 15Gb/s interface yields bi-directional bandwidth of up to 240GB/s, and increasing with future generations of the HMC technology. When integrated into Pico Computing’s HPC platform, the result is exceptionally high bandwidth and outstanding performance/Watt in a small but modular and highly scalable package (HMC devices operate at least 15 times faster than DDR3 and consume up to 70% less energy). And because our HMC IP was engineered for designers familiar with DDR3 memory, it’s easy to use.
Pico Computing’s high-performance solutions dramatically accelerate bioinformatics and other graph-structured data algorithms with 100 to >1,000X speedups. But when those applications require large amounts of memory—particularly random access memory—performance hits a wall. The HMC architecture changes that equation, effectively knocking down the memory wall. When managed by our powerful HMC Controller IP, the technology enables a huge leap forward for high-performance computing, opening up new applications, markets, and business models.
Pico Computing was the first to deliver a working HMC system, introducing the technology with Micron at SC’13 in November, 2013. Demonstrated in the PCI Express-based SB-800 board, the groundbreaking FPGA/HMC combination was quickly hailed as the world’s most powerful blade server. The SB-800 allows for either two- or four-link HMC configurations, and provides massive FPGA fabric capacity for systems development and prototyping.
The SB-850 is a full height, GPU-length, PCI Express board featuring up to eight HMC devices and a single high-performance Xilinx UltraScale FPGA. To provide for maximum flexibility, the HMCs can be configured (and reconfigured) for multiple use cases—whether used independently or in daisy-chain fashion.
HMC Controller—Have it Your Way
Pico Computing’s HMC Controller IP implements the full HMC specification, but is highly parameterized to yield truly optimized system configurations to meet exacting design objectives. The number of HMC links addressed, the number and width of internal ports, clock speeds, power, performance, area, and other details can be “dialed in” to yield precisely the configuration you require. Moreover, implementation of the HMC controller is made easy by virtue of Pico Computing’s framework—a Linux-based design utility that provides the essential link between the application software running on a host computer and the hardware algorithm, or firmware, implemented in the FPGA (the HMC controller is simply loaded into the FPGA(s) as a preconfigured bitfile).
FPGA: Pico Computing’s HMC controller IP, easily embedded in the fabric of advanced Altera or Xilinx FPGAs, creates an extremely efficient and flexible system solution that enables both HMC and FPGA devices to perform at their highest levels.
ASIC: The HMC Controller IP is available as RTL for integration into ASIC designs.
Pico Computing offers a complete solution for the HMC Controller, including:
- The complete HMC Controller specification in IP.
- Built-in analysis features that allow the evaluation, test, and characterization of the HMC in the context of your system.
- The Pico Computing Framework (PCIe, DMA engine, APIs, etc.), which greatly simplifies integration.
- Training and application support.
Contact us to discuss your HMC integration requirements.